A device employing a repeat structure of n type and p type layers of fine size (hereinafter, referred to as the “pn repeat structure”) applying field relaxation phenomena called a RESURF (Reduced SURface Field) effect, in place of a uniform n type drift layer of a conventional MOSFET (Metal Oxide Semiconductor Field Effect Transistor), has been proposed, e.g., in U.S. Pat. No. 6,040,600.
In the pn repeat structure where the n type and p type layers are provided repeatedly, the drift layers are likely to experience depletion, which is advantageous in that impurity concentrations of the drift layers can be increased and thus on-state resistance can be reduced. As such, an STM (Super Trench power MOSFET) structure is obtained which can achieve a breakdown voltage several times greater than a main breakdown voltage normally obtained with a single n type drift layer of high concentration. Hereinafter, the STM structure disclosed in U.S. Pat. No. 6,040,600 is described as a conventional example.
FIG. 19 is a schematic cross sectional view of a conventional STM structure. Referring to FIG. 19, a first main surface of a semiconductor substrate 101 is provided with a plurality of repeated trenches 101a. Provided within a region sandwiched between trenches 101a are n type and p type diffusion regions 103 and 104. N type diffusion region 103 is provided on a sidewall surface of one trench 101a and p type diffusion region 104 is provided on a sidewall surface of another trench 101a. N type and p type diffusion regions 103 and 104 constitute a pn junction along a depth direction of trench 101a. 
A p type body region 105 is formed on the first main surface side of n type and p type diffusion regions 103, 104. A source n+ diffusion region 106 is provided within p type body region 105 on the sidewall surface of one trench 101a. A gate electrode layer 109 is formed along the sidewall surface of one trench 101a such that gate electrode layer 109 is opposite to p type body region 105 sandwiched between source n+ diffusion region 106 and n type diffusion region 103, with a gate insulating layer 108 disposed between p type body region 105 and gate electrode layer 109.
Trench 101a is filled with a filling layer 110 formed of an insulator. A p+ diffusion region 107 is provided on the first main surface side of filling layer 110 and is in contact with p type body region 105. Furthermore, an n+ region of semiconductor substrate 101 is located on a second main surface side of the repeat structure consisting of n type and p type diffusion regions 103, 104 and trenches 101a. 
A source electrode layer 111 is formed on the first main surface to electrically connect with p type body region 105, source n+ diffusion region 106 and p+ diffusion region 107. A drain electrode layer 112 is formed on the second main surface to electrically connect with n+ region 101.
In this structure, total amounts of charges in neighboring n type and p type diffusion region 103 and 104 are made equal to each other to assure a high breakdown voltage.
When n type and p type diffusion regions 103, 104 adjacent to each other have equal total charge amounts, however, electric field strength upon avalanche breakdown (when held at a main breakdown voltage) would become approximately uniform in a region for forming n type and p type diffusion regions 103, 104. In such a case, an avalanche current would cause positive feedback, undesirably decreasing avalanche breakdown tolerance (non-clamp inductive load switching breakdown tolerance).
In particular, with the STM as shown in FIG. 19, impurities within n type and p type diffusion regions 103, 104 are localized in the vicinity of the sidewalls of trenches 101a, as shown in FIG. 20. Thus, at the time of avalanche breakdown described above, a current flows locally in the vicinity of the sidewalls of trenches 101a, as shown in FIG. 21. As such, the STM has an effective current density greater than that of another device having a uniform drift concentration, making the STM particularly inferior in avalanche breakdown tolerance.
FIG. 21 shows the simulation result, in which regions having high dot distribution densities within n type and p type diffusion regions 103, 104 each correspond to a region of high current density.